added some more code to spl.h

qse/include/qse/si/SpinLock.hpp

@@ -51,7 +51,7 @@ public:
 #if defined(QSE_SUPPORT_SPL)
 	SpinLock() QSE_CPP_NOEXCEPT: flag(QSE_SPL_INIT) {}
 #else
-	SpinLock() QSE_CPP_NOEXCEPT: flag(0) {}
+	SpinLock() QSE_CPP_NOEXCEPT: flag(ATOMIC_FLAG_INIT) {}
 #endif
 
 	bool tryock() QSE_CPP_NOEXCEPT

qse/include/qse/si/spl.h

@@ -135,6 +135,56 @@ asm void qse_spl_unlock (qse_spl_t* spl)
 }
 #endif
 
+
+#elif defined(__GNUC__) && (defined(__x86_64) || defined(__amd64) || defined(__i386) || defined(i386))
+
+	static QSE_INLINE int qse_spl_trylock (qse_spl_t* spl) 
+	{
+		register int x = 1;
+		__asm__ volatile (
+			"xchgl %0, (%2)\n"
+			: "=r"(x)
+			: "0"(x), "r"(spl)
+			: "memory"
+		);
+		return !x;
+	}
+	static QSE_INLINE void qse_spl_lock (qse_spl_t* spl) 
+	{
+		register int x = 1;
+		do
+		{
+			__asm__ volatile (
+				"xchgl %0, (%2)\n"
+				: "=r"(x)
+				: "0"(x), "r"(spl)
+				: "memory"
+			);
+		}
+		while (x);
+
+	}
+	static QSE_INLINE void qse_spl_unlock (qse_spl_t* spl) 
+	{
+	#if defined(__x86_64) || defined(__amd64)
+		__asm__ volatile (
+			"mfence\n\t"
+			"movl $0, (%0)\n"
+			:
+			:"r"(spl)
+			:"memory"
+		);
+	#else
+		__asm__ volatile (
+			"movl $0, (%0)\n"
+			:
+			:"r"(spl)
+			:"memory"
+		);
+	#endif
+	}
+
+
 #elif defined(QSE_SPL_NO_UNSUPPORTED_ERROR)
 	/* don't raise the compile time error */
 	#undef QSE_SUPPORT_SPL

qse/samples/si/spl01.c

@@ -34,7 +34,7 @@ static int thr_func (qse_thr_t* thr, void* ctx)
 		qse_printf (QSE_T("%s: [% 16d] [% 16d] [% 16d]\n"), xtn->name, i, i, i);
 		qse_spl_unlock (xtn->spl);
 		i++;
-		//sleep (1);
+		/*sleep (1);*/
 	}
 
 	return i;