refined the msb positioning functions
migrated hcl_isint()/hcl_isbigint() to hcl-prv.h
This commit is contained in:
136
lib/hcl-utl.h
136
lib/hcl-utl.h
@ -685,8 +685,9 @@ HCL_EXPORT int hcl_ucwidth (
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);
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/* ------------------------------------------------------------------------- */
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/* =========================================================================
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* BIT SWAP
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* ========================================================================= */
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#if defined(HCL_HAVE_INLINE)
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#if defined(HCL_HAVE_UINT16_T)
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@ -695,7 +696,10 @@ static HCL_INLINE hcl_uint16_t hcl_bswap16 (hcl_uint16_t x)
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#if defined(HCL_HAVE_BUILTIN_BSWAP16)
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return __builtin_bswap16(x);
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#elif defined(__GNUC__) && (defined(__x86_64) || defined(__amd64) || defined(__i386) || defined(i386))
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__asm__ volatile ("xchgb %b0, %h0" : "=Q"(x): "0"(x));
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__asm__ /*volatile*/ ("xchgb %b0, %h0" : "=Q"(x): "0"(x));
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return x;
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#elif defined(__GNUC__) && defined(__arm__) && (defined(__ARM_ARCH) && (__ARM_ARCH >= 6))
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__asm__ /*volatile*/ ("rev16 %0, %0" : "+r"(x));
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return x;
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#else
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return (x << 8) | (x >> 8);
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@ -709,7 +713,23 @@ static HCL_INLINE hcl_uint32_t hcl_bswap32 (hcl_uint32_t x)
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#if defined(HCL_HAVE_BUILTIN_BSWAP32)
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return __builtin_bswap32(x);
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#elif defined(__GNUC__) && (defined(__x86_64) || defined(__amd64) || defined(__i386) || defined(i386))
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__asm__ volatile ("bswapl %0" : "=r"(x) : "0"(x));
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__asm__ /*volatile*/ ("bswapl %0" : "=r"(x) : "0"(x));
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return x;
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#elif defined(__GNUC__) && defined(__aarch64__)
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__asm__ /*volatile*/ ("rev32 %0, %0" : "+r"(x));
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return x;
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#elif defined(__GNUC__) && defined(__arm__) && (defined(__ARM_ARCH) && (__ARM_ARCH >= 6))
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__asm__ /*volatile*/ ("rev %0, %0" : "+r"(x));
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return x;
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#elif defined(__GNUC__) && defined(__ARM_ARCH)
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hcl_uint32_t tmp;
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__asm__ /*volatile*/ (
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"eor %1, %0, %0, ror #16\n\t"
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"bic %1, %1, #0x00ff0000\n\t"
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"mov %0, %0, ror #8\n\t"
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"eor %0, %0, %1, lsr #8\n\t"
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:"+r"(x), "=&r"(tmp)
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);
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return x;
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#else
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return ((x >> 24)) |
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@ -726,7 +746,10 @@ static HCL_INLINE hcl_uint64_t hcl_bswap64 (hcl_uint64_t x)
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#if defined(HCL_HAVE_BUILTIN_BSWAP64)
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return __builtin_bswap64(x);
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#elif defined(__GNUC__) && (defined(__x86_64) || defined(__amd64))
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__asm__ volatile ("bswapq %0" : "=r"(x) : "0"(x));
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__asm__ /*volatile*/ ("bswapq %0" : "=r"(x) : "0"(x));
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return x;
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#elif defined(__GNUC__) && defined(__aarch64__)
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__asm__ /*volatile*/ ("rev %0, %0" : "+r"(x));
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return x;
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#else
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return ((x >> 56)) |
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@ -741,10 +764,12 @@ static HCL_INLINE hcl_uint64_t hcl_bswap64 (hcl_uint64_t x)
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}
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#endif
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#if defined(HCL_HAVE_UINT128_T)
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static HCL_INLINE hcl_uint128_t hcl_bswap128 (hcl_uint128_t x)
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{
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#if defined(HCL_HAVE_BUILTIN_BSWAP128)
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return __builtin_bswap128(x);
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#else
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return ((x >> 120)) |
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((x >> 104) & ((hcl_uint128_t)0xff << 8)) |
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((x >> 88) & ((hcl_uint128_t)0xff << 16)) |
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@ -761,23 +786,35 @@ static HCL_INLINE hcl_uint128_t hcl_bswap128 (hcl_uint128_t x)
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((x << 88) & ((hcl_uint128_t)0xff << 104)) |
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((x << 104) & ((hcl_uint128_t)0xff << 112)) |
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((x << 120));
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#endif
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}
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#endif
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#else
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#if defined(HCL_HAVE_UINT16_T)
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# if defined(HCL_HAVE_BUILTIN_BSWAP16)
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# define hcl_bswap16(x) ((hcl_uint16_t)__builtin_bswap16((hcl_uint16_t)(x)))
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# else
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# define hcl_bswap16(x) ((hcl_uint16_t)(((hcl_uint16_t)(x)) << 8) | (((hcl_uint16_t)(x)) >> 8))
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# endif
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#endif
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#if defined(HCL_HAVE_UINT32_T)
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# if defined(HCL_HAVE_BUILTIN_BSWAP32)
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# define hcl_bswap32(x) ((hcl_uint32_t)__builtin_bswap32((hcl_uint32_t)(x)))
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# else
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# define hcl_bswap32(x) ((hcl_uint32_t)(((((hcl_uint32_t)(x)) >> 24)) | \
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((((hcl_uint32_t)(x)) >> 8) & ((hcl_uint32_t)0xff << 8)) | \
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((((hcl_uint32_t)(x)) << 8) & ((hcl_uint32_t)0xff << 16)) | \
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((((hcl_uint32_t)(x)) << 24))))
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# endif
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#endif
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#if defined(HCL_HAVE_UINT64_T)
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# if defined(HCL_HAVE_BUILTIN_BSWAP64)
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# define hcl_bswap64(x) ((hcl_uint64_t)__builtin_bswap64((hcl_uint64_t)(x)))
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# else
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# define hcl_bswap64(x) ((hcl_uint64_t)(((((hcl_uint64_t)(x)) >> 56)) | \
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((((hcl_uint64_t)(x)) >> 40) & ((hcl_uint64_t)0xff << 8)) | \
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((((hcl_uint64_t)(x)) >> 24) & ((hcl_uint64_t)0xff << 16)) | \
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@ -786,9 +823,13 @@ static HCL_INLINE hcl_uint128_t hcl_bswap128 (hcl_uint128_t x)
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((((hcl_uint64_t)(x)) << 24) & ((hcl_uint64_t)0xff << 40)) | \
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((((hcl_uint64_t)(x)) << 40) & ((hcl_uint64_t)0xff << 48)) | \
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((((hcl_uint64_t)(x)) << 56))))
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# endif
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#endif
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#if defined(HCL_HAVE_UINT128_T)
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# if defined(HCL_HAVE_BUILTIN_BSWAP128)
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# define hcl_bswap128(x) ((hcl_uint128_t)__builtin_bswap128((hcl_uint128_t)(x)))
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# else
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# define hcl_bswap128(x) ((hcl_uint128_t)(((((hcl_uint128_t)(x)) >> 120)) | \
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((((hcl_uint128_t)(x)) >> 104) & ((hcl_uint128_t)0xff << 8)) | \
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((((hcl_uint128_t)(x)) >> 88) & ((hcl_uint128_t)0xff << 16)) | \
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@ -805,6 +846,7 @@ static HCL_INLINE hcl_uint128_t hcl_bswap128 (hcl_uint128_t x)
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((((hcl_uint128_t)(x)) << 88) & ((hcl_uint128_t)0xff << 104)) | \
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((((hcl_uint128_t)(x)) << 104) & ((hcl_uint128_t)0xff << 112)) | \
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((((hcl_uint128_t)(x)) << 120))))
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# endif
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#endif
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#endif /* HCL_HAVE_INLINE */
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@ -891,7 +933,89 @@ static HCL_INLINE hcl_uint128_t hcl_bswap128 (hcl_uint128_t x)
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# error UNKNOWN ENDIAN
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#endif
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/* =========================================================================
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* BIT POSITION
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* ========================================================================= */
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static HCL_INLINE int hcl_get_pos_of_msb_set_pow2 (hcl_oow_t x)
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{
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/* the caller must ensure that x is power of 2. if x happens to be zero,
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* the return value is undefined as each method used may give different result. */
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#if defined(HCL_HAVE_BUILTIN_CTZLL) && (HCL_SIZEOF_OOW_T == HCL_SIZEOF_LONG_LONG)
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return __builtin_ctzll(x); /* count the number of trailing zeros */
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#elif defined(HCL_HAVE_BUILTIN_CTZL) && (HCL_SIZEOF_OOW_T == HCL_SIZEOF_LONG)
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return __builtin_ctzl(x); /* count the number of trailing zeros */
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#elif defined(HCL_HAVE_BUILTIN_CTZ) && (HCL_SIZEOF_OOW_T == HCL_SIZEOF_INT)
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return __builtin_ctz(x); /* count the number of trailing zeros */
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#elif defined(__GNUC__) && (defined(__x86_64) || defined(__amd64) || defined(__i386) || defined(i386))
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hcl_oow_t pos;
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/* use the Bit Scan Forward instruction */
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#if 1
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__asm__ volatile (
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"bsf %1,%0\n\t"
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: "=r"(pos) /* output */
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: "r"(x) /* input */
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);
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#else
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__asm__ volatile (
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"bsf %[X],%[EXP]\n\t"
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: [EXP]"=r"(pos) /* output */
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: [X]"r"(x) /* input */
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);
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#endif
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return (int)pos;
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#elif defined(__GNUC__) && defined(__aarch64__) || (defined(__arm__) && (defined(__ARM_ARCH) && (__ARM_ARCH >= 5)))
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hcl_oow_t n;
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/* CLZ is available in ARMv5T and above. there is no instruction to
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* count trailing zeros or something similar. using RBIT with CLZ
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* would be good in ARMv6T2 and above to avoid further calculation
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* afte CLZ */
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__asm__ volatile (
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"clz %0,%1\n\t"
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: "=r"(n) /* output */
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: "r"(x) /* input */
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);
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return (int)(HCL_OOW_BITS - n - 1);
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/* TODO: PPC - use cntlz, cntlzw, cntlzd, SPARC - use lzcnt, MIPS clz */
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#else
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int pos = 0;
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while (x >>= 1) pos++;
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return pos;
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#endif
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}
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static HCL_INLINE int hcl_get_pos_of_msb_set (hcl_oow_t x)
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{
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/* x doesn't have to be power of 2. if x is zero, the result is undefined */
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#if defined(HCL_HAVE_BUILTIN_CLZLL) && (HCL_SIZEOF_OOW_T == HCL_SIZEOF_LONG_LONG)
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return HCL_OOW_BITS - __builtin_clzll(x) - 1; /* count the number of leading zeros */
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#elif defined(HCL_HAVE_BUILTIN_CLZL) && (HCL_SIZEOF_OOW_T == HCL_SIZEOF_LONG)
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return HCL_OOW_BITS - __builtin_clzl(x) - 1; /* count the number of leading zeros */
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#elif defined(HCL_HAVE_BUILTIN_CLZ) && (HCL_SIZEOF_OOW_T == HCL_SIZEOF_INT)
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return HCL_OOW_BITS - __builtin_clz(x) - 1; /* count the number of leading zeros */
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#elif defined(__GNUC__) && (defined(__x86_64) || defined(__amd64) || defined(__i386) || defined(i386))
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/* bit scan reverse. not all x86 CPUs have LZCNT. */
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hcl_oow_t pos;
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__asm__ volatile (
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"bsr %1,%0\n\t"
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: "=r"(pos) /* output */
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: "r"(x) /* input */
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);
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return (int)pos;
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#elif defined(__GNUC__) && defined(__aarch64__) || (defined(__arm__) && (defined(__ARM_ARCH) && (__ARM_ARCH >= 5)))
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hcl_oow_t n;
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__asm__ volatile (
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"clz %0,%1\n\t"
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: "=r"(n) /* output */
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: "r"(x) /* input */
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);
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return (int)(HCL_OOW_BITS - n - 1);
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/* TODO: PPC - use cntlz, cntlzw, cntlzd, SPARC - use lzcnt, MIPS clz */
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#else
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int pos = 0;
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while (x >>= 1) pos++;
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return pos;
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#endif
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}
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#if defined(__cplusplus)
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}
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#endif
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